Hardware Reference
In-Depth Information
as normalized ADIs:
;
for logic-0 (because the logical value on the line is 1 for no
bridge resistance) and [0,
1
] for logic-1 (because the logical value on the line is 1
for all bridge resistances).
Now, we illustrate the propagation through gate D when the ADIs at the gate's
inputs are normalized:
;
at the first and [R
C
0
,
1
] at the second input. The prop-
agation algorithm will consult the look-up table and determine that the ADI at the
output of an AND2 gate is obtained by intersecting the ADIs at its inputs. In this
case, the result will be
;
or logic-0. Propagation through gate G consists of looking
up the ADI construction rule for an XOR2 gate and application of that rule to the
normalized intervals ([R
C
0
,
1
]at
v
and [0, R
E
0
]at
w
). The rule to construct output
ADI A from input ADIs A
1
and A
2
is
A
D
A
1
\
A
2
[
A
1
\
A
2
:
.ŒR
C
0
;
1
\
ŒR
E
0
;
1
/
[
.Œ0; R
C
0
\
Œ0; R
E
0
/
Its application results in A
D
D
Œ0; R
E
0
[
ŒR
C
0
;
1
, which is the normalized version of [R
E
0
, R
C
0
]0/1.
4.2.3
Fault Coverage Calculation
To calculate
P-FC
of one fault, the integral of function ¡ over its C-ADI must
be computed. This is done by approximating the integral by the weighted sum of ¡
values for a large number of discrete bridge resistances. In our implementation
0
we
consider all integer R
sh
values for discretization. As mentioned above,
P-FC
values
for individual faults are averaged to obtain the
P-FC
value for the circuit.
Calculation of
E-FC
requires the upper bound R
max
for G-ADI. R
max
is defined as
the largest possible critical resistance. It is obtained by applying all possible FSICs,
determining all critical resistances and selecting the maximal critical resistance as
R
max
. A bridge resistance larger than R
max
is guaranteed to induce intermediate
voltage levels which will always be interpreted as fault-free logical values by all
subsequent gates. Hence, [0, R
max
] contains G-ADI (is an over-approximation).
A resistance in [0, R
max
] may not be included in G-ADI because a defect with
that resistance may require specific activation and propagation conditions which
cause a conflict that cannot be resolved. An activation condition is the FSIC needed
to detect the bridging defect. For instance, consider Fig.
4.3
again. A defect with
resistance slightly below R
E
can only be detected if FSIC 0011 is applied to the
bridged gates; it would not be detected under FSIC 0111. If the circuit shown in
Fig.
4.2
is part of a larger circuit, FSIC 0011 might not be justifiable at the fault site
by any input vector. Then, the defect is untestable and is excluded from G-ADI, yet
it is still included in [0, R
max
]. On the other hand, we have seen that an ADI can be
reduced or even eliminated during propagation. This is particularly the case if mul-
tiple ADIs are propagated through reconverging paths. G-ADI contains only bridge
resistances for which propagation to an output is possible and does not conflict with
