Hardware Reference
In-Depth Information
4.2.2
ADI Propagation
Once all local ADIs have been calculated, they are propagated through the circuit
(Line (7) of Procedure
RBF FSIM
). This is illustrated in Fig.
4.2
for FSIC 0111.
Consider the OR gate C . Its first input is 0 irrespective of the bridge resistance.
As explained above, its second input interprets logic-0 if R
sh
is within [0, R
C
0
]
and logic-1 otherwise. Hence, its output value
v
is 1 whenever its second input
interprets logic-1 and 0 whenever its second input interprets logic-0. In other words,
the logic value at
v
is described by ADI [0, R
C
0
] 0/1, which is identical to the
ADI on the second input of gate C . The ADI is propagated through gate C without
modifications.
AND gate D's first input happens to have the controlling value of 0. Irrespective
of the logic value interpreted by gate D's second input, the output value is 0. Hence,
the ADI is eliminated during propagation through gate D. No fault effect is observed
at gate D's output for any value of R
sh
.
Inverter E's output f is 0 if its input is 1, i.e., if R
sh
2
0; R
0
E
,and1otherwise.
The propagation of input ADI [0, R
0
E
] 1/0 through the inverter results in the inverted
ADI [0, R
0
E
] 0/1. (It could also have been equivalently written as [R
0
E
,
1
]1/0).
Propagation through the inverting NAND gate F with non-controlling value 1 at its
first input results in one more inversion of the interval, yielding the original ADI [0,
R
0
E
] at line
w
.
The XOR gate G has ADIs on both of his inputs. Gate G interprets logic-0 at
input
v
and logic-1 at input
w
and produces 1 at the output
z
for R
sh
2
0; R
0
E
G interprets 0 at both inputs and produces 0 at
z
.ForR
sh
2
ŒR
C
0
;
1
,gateG
interprets the fault-free values of logic-1 at
v
and logic-0 at
w
;thevalueat
z
is 0.
In summary, the resulting ADI at
z
is [R
0
E
, R
C
0
] 0/1. A new interval which did not
show up earlier is obtained by propagation through gate G. In general, it is possible
that non-continuous sets of intervals are created during propagation. For instance, it
would be possible to represent the obtained interval as
0; R
0
E
[
ŒR
C
0
;
1
1=0.
The circuit in Fig.
4.2
has two outputs: the output of gate D (to which no fault
effect has been propagated) and line
z
. Since the fault-free value at
z
is 1, the resistive
bridging fault is detected at
z
in interval [R
E
0
, R
C
0
]. This is the ADI A in Line (9) of
Procedure
RBF FSIM
. This interval will be merged with the C-ADI of the bridging
fault between lines a and b calculated so far.
The practical implementation of the propagation process relies on a set of pro-
cedures for interval manipulation (complement, merging, intersection etc.) and a
look-up-table which identifies the right operation from the type of the gate and the
ADIs at its inputs. The efficiency of the approach is enhanced if all ADIs are
nor-
malized
. An ADI of a line is called normalized if it contains all bridge resistances
for which the logicalvalueon theline is 1. All ADIs of shape[...] 0/1 are replaced
by the equivalentADIs of shape[...] 1/0. For instance, weobservedearlier that we
can write the ADI of line f as [0, R
E
0
]0/1oras[R
E
0
,
1
] 1/0. Only the second ver-
sion is normalized. If all ADIs are normalized, we can omit “1/0” and simply write
[R
E
0
,
1
]. Values which are independent of bridge resistance can also be written