Digital Signal Processing Reference
In-Depth Information
It does not make sense to put all effort in calculating the correct tail current
ratio or to minimize mismatch between transistor parameters if a significant
portion of the output signal is flowing to a parasitic output impedance. The at-
tentive reader may suggest that it may be possible to counteract this additional
source of distortion by changing the tail current ratio to a new optimum in one
way or another. But it is important to recognize that the resistive character of
the loading pair can never compensate for a parasitic capacitor, since the load
of these two impedances is 90
◦
out of phase. On the other hand, it is indeed
possible to employ a tunable tail current to neutralize an offset in the threshold
voltage or the transconductance factor. This could be exploited, for example,
during the calibration process of the amplifier. If the amplifier is embedded in
a digital receiver, a simple in-circuit two-tone test could be used to discover
the optimum tail current settings. After all, it is very convenient for a digital
receiver to monitor those frequencies where third-order intermodulation prod-
ucts are expected and then adjust the tail current ratio for optimum linearity
performance.
7.6
Implementation of a linearized open-loop amplifier
This section guides the reader through the actual design process of an open-
loop linearized baseband amplifier, which has been implemented in a stan-
dard 0
.
13
m cmos process. The basic architecture of the amplifier is built
around an eight-stage cascade of nonlinear loaded core amplifier cells. The
amplifier shows a gain of 30 dB in the broadband frequency range of 20 to
850 MHz. Thanks to the active diode-connected loads that partially compen-
sate the nonlinear transconductance characteristics of the gain transistors, an
output-referred oip
3
of better than 13 dBm could be achieved over the com-
plete frequency band. The chip occupies an area of 0
.
75
μ
0
.
75 mm
2
and draws
a total power of 56 mW from a single 1
.
2 V power supply.
×
Architectural reflections on the open-loop amplifier
One of the very first requirements of the amplifier is being able to directly drive
the input impedance of external measurement equipment. Doing this way, the
process of measuring and characterizing the amplifier becomes much more
convenient. Also, the influence of other building blocks (mixer, ad-converters)
on the linearity performance is completely ruled out from the equation. In order
to combine this requirement a considerable 3 dB bandwidth, the architecture of
the amplifier is based on a tapered structure. Just like in the case of high-speed
digital buffers, the dimensions of subsequent amplifiers are gradually scaled
up towards the final buffer stage.
