Digital Signal Processing Reference
In-Depth Information
inside the signal path, while in the latter case, the very low time constant
necessary for offset regulation can be brought to some point outside of the
signal-carrying highway. This is quite an important observation, since it leaves
the unenviable analog designer a lot more space for using tricks in order to pull
the low-frequency pole as close as possible to dc, without wasting a lot of pre-
cious silicon area. Among the possibilities to obtain a decent low-frequency
pole are, for example, the creation of high-impedance nodes by employing
a cascoded topology, enhanced with gain-boosting if necessary. But also ad-
vanced techniques such as the switched capacitor (switch-cap) technique or the
even more challenging charge-pump based analog filters may be a possibility.
7.2
Design considerations on the open-loop core stage
The limited voltage gain of the presented open-loop amplifier makes it a per-
fect candidate for two specific application areas. First, there is the popular
pipelined ad-converter. For an in-depth discussion concerning this matter, the
reader is referred to more specialized literature, but the most interesting fea-
ture about this architecture is that the ad-conversion is spread over several
cascaded stages, each resolving 1 or more bits during the digitization of the
input signal. In between each of these stages, the analog
residue
signal sample
must be amplified before it can be applied to the input of the next stage. The
requirements of this interstage amplifier are fairly simple: (1) it must have a
certain gain (preferably 6
.
02 dB), (2) it should be pretty fast and (3) it must
exhibit sufficient accuracy, depending on the resolution of the converter.
In most designs, a lot of effort goes into the fine-tuning of the gain and the
bandwidth of the feedback-based interstage amplifier. But all too often, the im-
portance of the dc-gain in the interstage amplifier is overestimated. Since the
amplifier is used in a sampled system, an accurate low-frequency gain indeed
offers good performance at the lower end of the spectrum. But for frequen-
cies closer to the Nyquist bandwidth of the converter, settling time and steady-
state error become tightly connected to the excess gain that is still available
at that particular frequency. The result is that the effective number of bits of
the converter will drop drastically for increasing signal frequencies. Among
others, this is one of the main reasons why the figure of merit (fom)ofanad-
converter should always take the effective resolution bandwidth (erbw)into
account, rather than the raw sample rate of the converter.
The second application domain of a high-speed open-loop amplifier is the vari-
able gain pre-amplifier (vga) in the front-end of a radio receiver. Cascading
several low-gain stages is a very efficient way to obtain an input stage with con-
siderable bandwidth and dynamic range. By dynamically inserting or switch-
ing off the redundant gain stages, the performance of the baseband-stage can
