Digital Signal Processing Reference
In-Depth Information
of the nine circuit subblocks. Embedded inside this power grid are the supply
decoupling capacitors, for a total distributed on-chip capacitance of 45 fF. Wide
diffusion guard rings were placed in the substrate directly underneath this low-
impedance ac-ground plane in order to isolate the subblocks from each other.
It is the responsibility of the power grid to provide a low-ohmic ground and
supply reference plane to all subcircuits of the receiver.
The prototype of the pulse-based radio unit was implemented in a 0
.
18
m
standard cmos process and has a supply voltage of 1
.
8V.
15
The total current
drawn from the external supply source is 67 mA (120 mW). The largest share
of the power consumption is taken into account by the high-speed prescaler and
cml divider section (46%), followed by the four 50
output drivers (29%) and
the baseband amplifier (20%). The high-speed prescaler was conservatively
overdesigned and a more conservative design should be able to bring down
the power consumption of this block about an order of magnitude. The exact
figure depends on the number of receive units that are driven by the prescaler:
the reader should keep in mind that the prototype chip only accommodates
one single receive unit. However, the pulse-based radio system - introduced
in Section 6.5 - relies on a small set of parallel receive units, which increases
the capacitive load on the quadrature lo-outputs of the prescaler. Furthermore,
a significant amount of power could be saved in a fully integrated receiver
design. The baseband instrumentation driver section can be omitted entirely if
the variable gain amplifier is directly connected to an on-chip ad-converter.
The first test-chip (Figure 6.11) presented here has proven the feasibility of
pulse-based radio receivers and at the same time brought a very important as-
pect of pulse-based radio to light: the very weak signals which are present in
the first input stages of a receiver are extremely vulnerable to noise and clock
injection. A direct connection (even capacitive) between noise sources con-
taining spectral components within the frequency band of the signal-of-interest
must be avoided under all circumstances. In the proposed receiver architecture,
this goal is achieved by relocating the windowing switches to the input of the
downconversion mixer. Frequency components within the rf signal band of
the receiver (3
.
1-10
.
6 GHz) must be removed from the signal driving the win-
dowing circuitry. Receivers based on template correlation will be victim to a
considerable amount of in-band noise if the correlation is done early in the
receive chain or will consume a lot of power due to the wideband signal ampli-
fication chain in front of the correlator section. Such implementations should
always be regarded as highly suspicious, either in terms of sensitivity or in
terms of power consumption.
μ
15
The nominal threshold voltages for nmost and pmost were about V
th,n
=
0
.
52 V and V
th,p
=
0
.
48 V.
