BIOMIMETIC CORTICAL NANOCIRCUITS - Bio-Inspired and Nanoscale Integrated Computing - page 478

6. T. W. Berger, et al. Restoring lost cognitive function. IEEE Engineering in Medicine and
Biology Magazine, 24(5): pp 30-44, 2005.
7. J. V. Arthur and K. Boahen. Learning in silicon: timing is everything. Advances in
Neural Information Processing Systems, 18: pp 75-82, 2006.
8. Brain Mind Institute, Ecole Polytechnique Federale de Lausanne. http://bmi.epfl.ch/.
9. G. Shepherd. Introduction to synaptic circuits. In: G. Sheperd, editor The Synaptic
Organization of the Brain, 5th ed. New York: Oxford University Press, 2004.
10. J. Deng and H. S. P. Wong. A circuit-compatible SPICE model for enhancement mode
carbon nanotube field effect transistors. Conference on Simulation of Semiconductor
Devices and Processes, SISPAD 2006, Monterey, California, Sept. 6-8: pp 166-169,
2006.
11. C. Li, D. Zhang, S. Han, X. Li, T. Tang, and C. Zhou. Diameter-controlled growth of
single-crystalline In 2 O 3 nanowires and their electronic properties. Advanced Materials,
15: pp 143-145, 2003.
12. Z. Liu, D. Zhang, S. Han, C. Li, T. Tang, W. Jin, X. Liu, B. Lei, and C Zhou. Laser
ablation synthesis and electronic transport studies of tin oxide nanowires. Advanced
Materials, 15: pp 1754-1757, 2003.
13. Mouse brain simulated on computer. http://news.bbc.co.uk/2/hi/technology/6600965.
stm.
14. http://www.intel.com/technology/silicon/high-k.htm.
15. A. K. Friesz, A. C. Parker, C. Zhou, K. Ryu, J. M. Sanders, H. S. Philip Wong, and
J. Deng. A biomimetic carbon nanotube synapse circuit. Presented as a poster at The
Biomedical Engineering Society 2007 Annual Fall Meeting, BMES 2007: Sep 2007.
http://eve.usc.edu/Publications/cntfinal2.pdf/.
16. G. Chen and T. Ueta. Chaos in Circuits and Systems. Singapore: World Scientific, 2002.
17. Schuffny, R. et al. Hardware for neural networks. 4th International Workshop Neural
Networks in Applications: Mar 1999.
18. S. Furber. http://www.cs.manchester.ac.uk/apt/people/sfurber/.
19. L. O. Chua. CNN chips crank up the computing power. IEEE Circuits and Devices,
12(4): pp 18-27, July 1996.
20. R. B. Wells. Preliminary discussion of the design of a large-scale general-purpose
neurocomputer. MRC Institute, The University of Idaho, Nov 14, 2003. http://
www.mrc.uidaho.edu/rwells/techdocs/Preliminary Discussion of the Design of a GP
Neurocomputer.pdf
21. C. Mead. Analog VLSI and Neural Systems. Reading, MA: Addison-Wesley, 1989.
22. E. Farquhar and P. Hasler. A bio-physically inspired silicon neuron. IEEE Transac-
tions on Circuits and Systems, 52(3): pp 477-488, Mar 2005.
23. M. Mahowald. VLSI analogs of neuronal visual processing: a synthesis of form and
function. Ph.D. Dissertation, California Institute of Technology, Pasadena, 1992.
24. K. A. Zaghloul and K. Boahen. Optic nerve signals in a neuromorphic chip II: testing
and results. IEEE Transactions on Biomedical Engineering, 51(4): pp 667-675, Apr
2004.
25. K. M. Hynna and K. Boahen. Neuronal ion-channel dynamics in silicon. IEEE
International Symposium on Circuits and Systems, 2006 (ISCAS 2006): pp 21-24,
May 2006.