Internal Memory Configuration and External Expansion - The HCS12/9S12: An Introduction to Software and Hardware Interfacing - page 754

Both the flash memory and EEPROM can be protected from inadvertent erasure. The soft-
ware stored in the flash memory can be secured from being pirated.
Certain applications require more memory than the amount available in any of the HCS12
members. Adding external memory is one solution to this problem. External memory can be
added only in the expanded modes. There are two expanded modes: narrow and wide. The
expanded narrow mode allows the designer to add 8-bit-wide external memory; the expanded
wide mode allows the user to add 16-bit-wide memory to the HCS12.
Most 8- and 16-bit microcontrollers multiplex their address and data buses onto the same
set of pins in order to lower the pin count and device cost. All of the read and write cycles
take exactly one E-clock cycle to complete. However, the HCS12 allows the user to stretch
the E-clock so that the slower but less expensive memory chips can be used in the product.
A read or write cycle starts with the E-clock going low. When the E-clock is low, the HCS12
drives the address onto the multiplexed address/data bus. The control circuitry outside the
MCU latches the address to keep it valid throughout the whole bus cycle. When the E-clock
goes high, the HCS12 stops driving the address onto the bus and either waits for the read data
to be returned from the memory devices or drives data to be written into external memory on
the multiplexed bus.
There are three major issues in the external memory expansion:
• Memory space assignment
• Address decoder design and certain additional signals generation
• Timing verification
14.12 Exercises
E14.1 Write a program to erase the fi rst 100 words of the on-chip EEPROM and then to write
the values 1, 2, . . . , 100 to these 100 words, read them back, and store them in the fi rst 100
words of the on-chip SRAM.
E14.2 Write an instruction sequence to remap the register block so that it starts at $1000.
E14.3 Write an instruction sequence to remap the SRAM block so that it starts at $2000.
E14.4 Write an instruction sequence to disable E-clock stretch and disable on-chip ROM for
expanded mode.
E14.5 Write an instruction sequence to map the EEPROM block to start from $0000.
E14.6 Give an instruction to protect the highest 64 bytes of the EEPROM.
E14.7 Write an instruction sequence to protect the 1 kB in the lower address range and the 4 kB
in the higher address range of the fl ash 3 of the HCS12DG256.
E14.8 Write a C function that erases the EEPROM in bulk.
E14.9 Write a C function that erases the EEPROM in bulk and verifi es it.
E14.10 What is the slowest SRAM read access time that does not require the designer to stretch
the E-clock of the HCS12? Assume the E-clock frequency is 25 MHz.
14.13 Lab Exercise and Assignment
L14.1 Write a program to store the fi rst 100 prime numbers (starting from 2 and upward) in the
on-chip EEPROM starting from address $400. Read out the prime numbers and display them to
the terminal monitor with each line displaying fi ve numbers.