Hardware Reference
In-Depth Information
The control signals that are multiplexed on Port E pins must be programmed properly in
order for external bus cycles to proceed properly. The designer needs to program the PEAR reg-
ister to enable the required signals, including R/W, E-clock, LSTRB, and others. The signals
NOACC, IPIPE1, and IPIPE0 need not be enabled if the HCS12 is not designed to be debugged
by the in-circuit emulator.
Example 14.20
Give a value to be written into the PEAR register to achieve the following setting:
Enable E-clock output
Enable the R/W output
Enable the LSTRB output
Disable the NOACC, IPIPE1, and IPEP0 outputs
Solution: The value to be written into the PEAR register to achieve this setting is $0C.
14.11 Summary
The HCS12 has on-chip memory resources, including I/O registers, SRAM, EEPROM, and
flash memory. The I/O registers, SRAM, and EEPROM can be remapped to other memory spaces
when the application requires it. It is possible to have two or more memory resources overlapped.
The HCS12 assigns precedence to each memory resource. The memory resource with the highest
precedence is selected when two or more memory resources overlap in their spaces. The remap-
ping of memory resources is performed by programming their associated initialization registers.
Limited by its 16-bit architecture, the HCS12 uses the paging technique to allow programs
to access memory space larger than the 64-kB limit. The paging window is located at $8000
to $BFFF. An additional 6-bit PPAGE register is used to facilitate the mapping from the paging
window to the actual memory block to be accessed. The HCS12 uses this technique to allow
the application program to access up to 1 MB of memory space. Whenever the program wants
to access expanded memory, it sets the address to be in the range of this window and also sets
the appropriate value to the PPAGE register. After this, the hardware maps to the correspond-
ing location to perform the access. Writing programs to take advantage of the expanded mem-
ory incurs quite a bit of overhead in assembly language. Neither the asmIDE nor the MiniIDE
supports expanded memory. Many C compilers (including the ICC12 from Imagecraft and the
CodeWarrior from Metrowerks) support the expanded memory. It is recommended that C lan-
guage be used to write application programs whenever expanded memory is needed.
Both the flash memory and the EEPROM need to be erased before they can be pro-
grammed with new values. The algorithms of erasure and programming for these two mem-
ory technologies are quite similar. Before erasing and programming the flash memory and
EEPROM, the designer needs to make sure that they are not protected. The erasure and pro-
gramming operations are controlled by a clock signal that is derived by dividing the E-clock
by a prescaler. The following four operations are common in flash memory and EEPROM
erasure and programming:
Clear the error flags in ESTAT (or FSTAT).
Write a word to a location in the sector to be erased or programmed.
Write a command to the command register (ECMD or FCMD).
Clear the CBEIF flag to launch the command.
 
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