Internal Memory Configuration and External Expansion - The HCS12/9S12: An Introduction to Software and Hardware Interfacing - page 721

Start

No

Is EDIVLD bit set?

Write ECLKDIV register

Ye s

Write array address and
program data

Write program command $20
to the ECMD register

Write $80 to register ESTAT
to clear the CBEIF bit

Ye s

Protection
violation check

Write $20 to ESTAT
to clear the PVIOL bit

Bit PVIOL
set?

No

Ye s

Access
error check

Write $10 to ESTAT to
clear the ACCERR bit

Bit ACCERR
set?

No

Ye s Ye s

Address, data,
command buffer
empty check

Next
write?

Bit CBEIF
set?

No

No

Command
completion check

No

Bit CCIF
set?

Ye s

Stop

Figure 14.24 ■ HCS12 EEPROM program algorithm

The execution of the first four EEPROM commands as listed at the end of Section 14.6.2
follows the same three-step sequence as their counterparts in flash memory:
1. Write the aligned data word to be programmed to the valid EEPROM address space.
The address and data will be stored in internal buffers. For programming, all address
bits are valid. For erasure, the value of the data bytes is “don't care.” For bulk erasure,
the address can be anywhere in the available address space of the block to be erased.
For sector erasure, the address bits 1 and 0 are ignored for the EEPROM.
2. Write the program or erase command to the command register.
3. Clear the CBEIF flag to launch the command. The clearing of the CBEIF bit indicates
that the command was successfully launched.