Hardware Reference
In-Depth Information
7
6
5
4
3
2
1
0
Reset value
= 0x00
0
0
0
0
0
TX2
TX1
TX0
TX2
,
TX0: transmit buffer k (
= 0,1, or 2) select bits
0 = the associated message buffer is deselected.
1 = the associated message buffer is selected, if it is the lowest-numbered bit.
k
Figure 13.27
■
MSCAN transmitter buffer select register (CAN
x
TBSEL,
x
5
0, 1, 2, 3, or 4)
When one wants to get the next available transmit buffer, the CAN
x
TFLG register is read
and this value is written into the CAN
x
TBSEL register. Suppose that all three transmit buf-
fers are available. The value read from CAN
x
TFLG is therefore %00000111. When writing
this value back to CAN
x
TSEL, the transmit buffer 0 is selected as the foreground transmit
buffer because the lowest-numbered bit set to 1 is at bit position 0. Reading back this value
of CAN
x
TSEL results in %00000001, because only the lowest-numbered bit position set to 1
is presented. This mechanism eases the application software selection of the next available
transmit buffer. This situation is shown in the following instruction sequence:
ldaa
CAN1TFLG
; value read is %00000111
staa
CAN1TBSEL
; value written is %00000111
ldaa
CAN1TBSEL
; value read is %00000001
MSCAN I
DENTIFIER
A
CCEPTANCE
C
ONTROL
R
EGISTER
(CAN
X
IDAC)
This register provides for identifier acceptance control as shown in Figure 13.28. The
IDHITx indicators are always related to the message in the foreground receive buffer (RxFG).
When a message gets shifted into the foreground buffer of the receiver FIFO, the indicators are
updated as well.
7
6
5
4
3
2
1
0
Reset value
= 0x00
0
0
IDAM1
IDAM0
0
IDHIT2
IDHIT1
IDHIT0
IDAM1
,
IDAM0: identifier acceptance mode
00 = two 32-bit acceptance filters.
01 = four 16-bit acceptance filters.
10 = eight 8-bit acceptance filters.
11 = filter closed
IDHIT2
,
IDHIT0: identifier acceptance hit indicator (read only)
000 = filter 0 hit.
001 = filter 1 hit.
010 = filter 2 hit.
011 = filter 3 hit.
100 = filter 4 hit.
101 = filter 5 hit.
110 = filter 6 hit.
111 = filter 7 hit.
Figure 13.28
■
MSCAN identifier acceptance control register (CAN
x
IDAC,
x
5
0, 1, 2, 3, or 4)
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