Controller Area Network (CAN) - The HCS12/9S12: An Introduction to Software and Hardware Interfacing - page 653

The bit time is determined by the oscillator frequency, the baud rate prescaler, and the num-
ber of time quanta ( t Q ) clock cycles per bit. The bit time is given by the following expression:

prescaler value
f CANCLK

Bit time 5 3 (1 1 TimeSegment1 1 TimeSegment2)

TimeSegment1 consists of prop_seg and phase_seg1. TimeSegment2 is the same as
phase_seg2.

MSCAN R ECEIVER F LAG R EGISTER (CAN X RFLG)
This register contains status flags related to CAN reception. The contents of this register
are shown in Figure 13.21. The WUPIF flag will be set to 1 if the MSCAN detects CAN bus
activity and the WUPE bit of the CAN x CTL0 register is set to 1. The CSCIF flag will be set
to 1 when the MSCAN changes its current bus status due to the actual value of the transmit
error counter and the receive error counter. If a valid message is received when all five receive
buffers are full, then the OVRIF flag will be set to 1 to indicate this overflow condition. When
the receive FIFO is not empty, the RXF flag is set to 1. The flag bits WUPIF, CSCIF, OVRIF, and
RXF are cleared by writing a 1 to them.

7 6 5 4 3 2 1 0

Reset value
= 0x00

WUPIF CSCIF RSTAT1 RSTAT0 TSTAT1 TSTAT0 OVRIF RXF

WUPIF: wake-up interrupt flag
0 = no wake-up activity observed while in sleep mode.
1 = MSCAN detected activity on the bus and requested wake-up.
CSCIF: CAN status change interrupt flag
0 = no change in bus status occurred since last interrupt.
1 = MSCAN changed current bus status.
RSTAT1 , RSTAT0: receiver status bits
00 = RxOK: 0

≤ Receive error counter ≤ 96.

01 = RxWRN: 96 < Receive error counter ≤ 127.

10 = RxERR: 127 < Receive error counter.
11 = Bus-off 1 : Transmit error counter > 255.
TSTAT1 , TSTAT0: transmitter status bits
00 = TxOK: 0

96.
01 = TxWRN: 96 < Transmit error counter ≤ 127.
10 = TxERR: 127 < Transmit error counter.
11 = Bus-off: Transmit error counter > 255.
OVRIF: overrun interrupt flag
0 = no data overrun occurred.
1 = a data overrun detected.
RXF: receive buffer full flag
0 = no new message available within the RxFG.
1 = the receive FIFO is not empty. A new message is available in the RxFG.
Note 1. This information is redundant. As soon as the transmitter leaves its
bus-off state, the receiver state skips to RxOK too.

≤ Transmit error counter ≤

Figure 13.21 ■ MSCAN receiver flag register (CAN x RFLG, x 5 0, 1, 2, 3, or 4)