Hardware Reference
In-Depth Information
ldaa
IBDR
; place the high byte of temperature in A
brclr
IBSR,IBIF,*
; wait for the low byte read to complete
movb
#IBIF,IBSR
; clear the IBIF flag
bclr
IBCR,MSSL
; generate a STOP condition
ldab
IBDR
; place the low byte of temperature in B
ldx
#0
; correct return code
rts
rdErr
ldx
# 2 1
rts
The C language version of the function is straightforward and is left as an exercise problem.
11.8 Interfacing the Serial EEPROM 24LC08B with I 2 C
Some applications require the use of a large amount of nonvolatile memory because these
applications are powered by batteries and may be used in the field for an extended period of
time. Many semiconductor manufacturers produce serial EEPROMs with a serial interface.
Both serial EEPROMs with SPI and I 2 C interfaces are available.
The 24LC08B is a serial EEPROM from Microchip with the I 2 C interface. This device is an
8-kbit EEPROM organized as four blocks of 256 3 8-bit memory. Low-voltage design permits
operation down to 2.5 V with standby and active currents of only 1
A and 1 mA, respectively.
The 24LC08B also has a pagewrite capability for up to 16 bytes of data.
μ
11.8.1 Pin Assignment and Block Diagram
The pin assignment and the block diagram of the 24LC08B are shown in Figures 11.36 and
11.37, respectively. Pins A2, A1, and A0 are not used. The SCL and SDA pins are for I 2 C bus
communications. The frequency of the SCL input can be as high as 400 kHz. The WP pin is
used as the write protection input. When this pin is high, the 24LC08B cannot be written into.
The pins A2,A0 are not used and can be left floating, grounded, or pulled to high.
A0
Vcc
WP
A1
A2
SCL
SDA
Vss
Figure 11.36 24LC08B PDIP package pin assignment
11.8.2 Device Addressing
Like any other I 2 C slave, the first byte sent to the 24LC08B after the start condition is the
control byte. The contents of the control byte for the 24LC08B are shown in Figure 11.38.
 
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