Hardware Reference
In-Depth Information
O0
to
O23
PWM
brightness
control
I SET
Current
source
LED
drivers
Divider/
counter
network
OSC
Row
multiplexer
Character-
generator
RAM
Character-
generator
ROM
Blink
speed
select
Blink
Configuration
register
RAM
CLK
CS
DIN
DOUT
Serial interface
Figure 10.26 MAX6952 functional diagram
The upper 8 bits of the shift register select the destination register to which the lower 8 bits of
the shift register are to be transferred. The address map of the MAX6952 is shown in Table 10.9.
The procedure for writing the MAX6952 is as follows:
Step 1
Pull the CLK signal to low.
Step 2
Pull the CS signal to low to enable the internal 16-bit shift register.
Step 3
Shift in 16 bits of data from the DIN pin with the most significant bit first. The most
significant bit (D15) must be low for a write operation.
Step 4
Pull the CS signal to high.
Step 5
Pull the CLK signal to low.
 
 
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