Hardware Reference
In-Depth Information
Address (command byte)
Hex
Code
Register
D15
D14
D13
D12
D11
D10
D9
D8
No op
Intensity10
Intensity32
Scan limit
Configuration
User-defined fonts
Factory reserved (do not write into)
Display test
Digit 0 plane P0
Digit 1 plane P0
Digit 2 plane P0
Digit 3 plane P0
Digit 0 plane P1
Digit 1 plane P1
Digit 2 plane P1
Digit 3 plane P1
Write digit 0 plane P0 and plane P1 with
same data (reads as 0x00)
Write digit 1 plane P0 and plane P1 with
same data (reads as 0x00)
Write digit 2 plane P0 and plane P1 with
same data (reads as 0x00)
Write digit 3 plane P0 and plane P1 with
same data (reads as 0x00)
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/
W
R/
W
R/
W
R/
W
R/
W
R/
W
R/
W
R/W
R/W
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
0x00
0x01
0x02
0x03
0x04
0x05
0x06
0x07
0x20
0x21
0x22
0x23
0x40
0x41
0x42
0x43
0x60
R/W
1
1
0
0
0
0
1
0x61
R/W
1
1
0
0
0
1
0
0x62
R/W
1
1
0
0
0
1
1
0x63
Table 10.9
■
MAX6952 register address map
Any register data within the MAX6952 may be read by setting the D15 bit to 1. The proce-
dure to read a register is as follows:
Step 1
Pull CLK to low.
Step 2
Pull the CS signal to low to enable the internal shift register.
Step 3
Clock 16 bits of data into the DIN pin with bit 15 first. Bit 15 must be 1. Bit 14 to bit 8
contain the address of the register to be read. Bits 7 through 0 contain dummy data.
Step 4
Pull the CS signal to high. Bits 7 to 0 of the serial shift register will be loaded with the
data in the register addressed by bits 15 through 8.
Step 5
Pull CLK to low.
Step 6
Issue another read command (which can be a no-op), and examine the bit stream at the
DOUT pin. The second 8 bits are the contents of the register addressed by bits 14 to 8 in
step 3.
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