The SPI Function - The HCS12/9S12: An Introduction to Software and Hardware Interfacing - page 488

• LC: Latch clock. The rising edge of this signal loads the contents of the shift
reg ister into the output latch.
• OE: Output enable. A low on this pin allows the data from the latch to be
presented at the output pins Q A , . . . , Q H .
• Q A to Q H : Noninverted, tri-state latch outputs.
• SQ H : Serial data output . This is the output of the eighth stage of the 8-bit shift
register. This output does not have tri-state capability.
The 74HC595 is designed to shift in 8-bit data serially and then transfer it to the latch to
be used as parallel data. The 74HC595 can be used to add parallel output ports to the HCS12.
Both the connection methods shown in Figures 10.9 and 10.10 can be used in appropriate
applications.

Example 10.5
▼ Describe how to use two 74HC595s to drive eight common-cathode seven-segment dis-
plays, assuming that the E-clock frequency of the HCS12 is 24 MHz.
Solution: Two 74HC595s can be cascaded using the method shown in Figure 10.10. One
74HC595 is used to hold the seven-segment pattern, whereas the other 74HC595 is used to
carry digit-select signals. The circuit connection is shown in Figure 10.12.
Since there are only seven segments, the Q H bit of the segment-control 74HC595 is not
needed. The PK7 pin is used to control the LC input of the 74HC595. The time-multiplexing
technique illustrated in Example 4.14 will be used to display multiple digits in Figure 10.12.

5 V

(7) (6) (0)

300 Ω

a
b

a
b

a
b

Q G
Q F

Reset

OE

74HC595

300 Ω

g g g

Q A

DS

Common
cathode

Common
cathode

Common
cathode

SC LC SQ H

5 V

reset
Q H

MOSI0 R

DS 2N2222

SC

SCK0

R

2N2222

Q G

LC

PK7

R

OE

2N2222

Q A

HCS12

74HC595

Figure 10.12 ■ Two 74HC595s together drive eight seven-segment displays