Hardware Reference
In-Depth Information
10.7 SPI-Compatible Chips
The SPI is a protocol proposed by Freescale to interface peripheral devices to a microcon-
troller. As long as a peripheral device supports the SPI interface protocol, it can be used with
any microcontroller that implements the SPI subsystem. Many semiconductor manufacturers
are producing SPI-compatible peripheral chips. The Freescale SPI protocol is compatible with
the National Semiconductor Microwire protocol. Therefore, any peripheral device that is com-
patible with the SPI can also be interfaced with the Microwire protocol.
10.8 The 74HC595 Shift Register
As shown in Figure 10.11, the 74HC595 consists of an 8-bit shift register and an 8-bit
D-type latch with three-state parallel outputs. The shift register accepts serial data and provides
a serial output. The shift register also provides parallel data to the 8-bit latch. The shift register
and the latch have different clock sources. This device also has an asynchronous reset input.
The frequency of the shift clock can be as high as 100 MHz.
The functions of the pins in Figure 10.11 are as follows:
DS: Serial data input . The data on this pin is shifted into the 8-bit shift register.
SC: Shift clock . A low-to-high transition on this signal causes the data at the serial
input pin to be shifted into the 8-bit shift register.
Reset. A low on this pin resets the shift register portion of this device only. The
8-bit latch is not affected.
14
15
DS
Q A
Q B
Q C
Q D
Q E
Q F
Q G
Q H
1
2
3
4
5
6
7
Shift
register
Latch
11
SC
10
Reset
9
SQ H
12
LC
13
OE
V CC = Pin 16
GND = Pin 8
Figure 10.11 The 74HC595 block diagram and pin assignment
 
 
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