The SPI Function - The HCS12/9S12: An Introduction to Software and Hardware Interfacing - page 484

This type of configuration is often used to extend the capability of the SPI slave. For exam-
ple, suppose there is an SPI-compatible seven-segment display driver/decoder that can drive only
four digits. By using this configuration, up to 4 3 k digits can be displayed when k driver/decoders
are cascaded together.
Depending on the capability and role of the slave device, either the MISO or MOSI pin
may not be used in the data transfer. Many SPI-compatible peripheral chips do not have the
MISO pin.

10.6 Configuration of and Data Transfer in SPI

Most peripheral chips with the SPI interface have either a chip-select (CS) or chip-enable
(CE) signal to enable data exchange with the chip. One needs to assert this signal in order to per-
form data exchange with the device. Before data transfer can be started, the SPI function must
be properly configured. The designer needs to deal with four registers: the WOMS, SPI x BR,
SPI x CR1, and SPI x CR2 registers. In addition, the Port S pins pull-up must be enabled so that no
external pull-up device is needed.

Example 10.3
▼ Configure the SPI0 module to operate with the following settings assuming that the E-clock
is 24 MHz:
• Baud rate at 6 MHz
• Interrupt disabled
• SPI enabled
• SCK idle low
• Data to be latched on the rising edge of SCK
• Master mode
• Most significant bit of a data byte is transferred first
• Mode fault and SS output disabled
• Normal SPI operation
• SPI stopped in wait mode
Solution: Since 24 MHz/6 MHz 5 4, we need to set SPPR2,SPPR0 and SPR2,SPR0 to 001 and
000, respectively. Therefore, the value to be written into the SPI0BR register would be $10. For
other parameters, we need to write $50 and $02 into SPI0CR1 and SPI0CR, respectively. The
WOMS register must also be cleared to enable the Port S pull-up.
The following instruction sequence will configure the SPI as desired:

movb #$10,SPI0BR ; set baud rate to 6 MHz (the value of 0x01 will also work)

movb #$50,SPI0CR1 ; disable interrupt, enable SPI, SCK idle low,

; data latched on rising edge, data transferred msb first

movb #$02,SPI0CR2 ; disable bidirectional mode, stop SPI in wait mode

movb #0,WOMS ; enable Port S pull-up