A Low Power Interference Robust IR-UWB Transceiver SoC for WBAN Applications - Ultra-Wideband and 60 GHz Communications for Biomedical Applications - page 38

Fig. 15 Transceiver system
on chip (SoC) chip photo

consumes 0.5 mW. When TX/RX link is synchronized, the RX duty cycle control
signal from DBB will enable the duty cycling of RX, so that RX average power
consumption can be reduced significantly. For 1 Mb/s data rate, 10 % duty cycle is
achieved given the approximate 90 ns front-end startup time and 2 ns UWB pulse
width. The measured RX energy efficiency with duty cycling is 4.5 nJ/bit.
The measured UWB transmitter output time-domain waveform and the corre-
sponding signal spectrum is shown in Fig. 16 a and 16 b. The UWB pulse width is
around 2 ns and the peak-to-peak output amplitude is 4.2 V. The output amplitude
can be adjusted by changing the transmitter buffer setting. The signal spectrum is
centered at 4.0 GHz and exhibits a 1.68 GHz bandwidth which meets FCC regulation
of both the peak and average output power. Figure 17 shows the measured receiver
LNA S-parameters and noise figure in high gain/low gain modes. The maximum
voltage gain in high/low gain mode is 33 dB/12 dB with a corresponding measured
minimum noise figure of 4.7 dB/5.2 dB at 4.0 GHz. The measured LNA IIP3 for
high/low gain mode is 37.8 dBm/20.5 dBm respectively, as shown in Fig. 18 .

Figure 19 presents the measured squarer output voltage versus RX input UWB pulse
power. It can be observed that the squarer RMS output voltage amplitude grows
linearly with the increase of input RF power in the range of

−

70 dBm
until it gets saturated at approximately 80 mV when the input power is above

− 80 dBm to −

70
dBm. The usage of cascode stage and active load in squarer limits the output voltage

−

4

-30

-40

2

10dB

-50

0

1.68 G Hz

-60

-2

-70

-4 -80

0 2 4 6 8 10 1 2 3 4 5 6 7

Time (ns) Frequency (GHz)

a b

Fig. 16 a Measured TX output time domain waveform. b Measured TX output spectrum