Cryptography Reference
In-Depth Information
Figure 9.10 - The different "compact mode" architectures for implementing the generic
operator
⊗
.
is applied at all the inputs (total sum) then each output is calculated by
eliminating the contribution of the corresponding input, with the help of
the inverse operator.
It is possible to modify these architectures in order to introduce intermediate
pipeline
registers enabling the critical path to be reduced. There are also archi-
tectures of the serial type (Figure 9.10(c)).
In what follows, the degree of parallelism of a GNP will be denoted
α
g
.This
is the number of cycles necessary to process a node (without considering latency
due to the
pipeline
processing).
Thus, for a parallel architecture capable of
