Cryptography Reference
In-Depth Information
Figure 9.8 shows the performance of an LDPC code for different sizes and differ-
ent rates in the case of a DVB-S2 decoder implemented on an Altera Stratix80
FPGA.
LDPC codes therefore have an excellent theoretical performance. This must
however be translated by simplicity in their hardware implementation to enable
these codes to be used in practice. That is why particular attention must be
paid to LDPC decoder architectures and implementations.
R=1/2
R=3/4
R=4/5
R=5/6
R=8/9
R=9/10
0.1
0.01
0.001
0.0001
1e05
1e06
1e07
1
2
3
4
5
Eb/No
Figure 9.8 - Packet error rate (or Frame error rate, FER) obtained for codeword sizes
of 64 kbits and different rates of the DVB-S2 standard (50 iterations, fixed point).
With the permission of TurboConcept S.A.S, France.
9.1.6 Some geometrical constructions of LDPC codes
To complete the random constructions presented above, we list below some
deterministic constructions leaving much less room, if any, for random ones.
Cayley / Ramanujan constructions
Margulis [9.43] was the first to propose algebraic LDPC codes. Then Rosenthal
and Votonbel [9.50, 9.51] extended these results to obtain high expansion factor
graphs with high girths, using Ramanujan graphs instead of Cayley graphs.
Some drawbacks were raised by MacKay and Postol [9.38] about these codes
(error floor and low minimum distance for some sets of parameters).
