Digital Signal Processing Reference
In-Depth Information
Fig. 10.9
Schematic showing the TRL data cascaded with the input and output embedding net-
works
revealing that a good agreement exists between them. If the agreement is not sat-
isfactory, the components that compose the embedding network model can be fine
tuned to minimize the discrepancies.
Once the agreement is found to be enough, the embedding network data is added
in cascade to the TRL data (or de-embedded SOLT data) to reconstitute the origi-
nal SOLT measurement data, but at this time with complete knowledge of the em-
bedding network parameters and control of where to place shunt capacitors. The
situation at schematic level is depicted in Fig.
10.9
.
10.3.5 Fifth Step
As previously stated, this example targets a simultaneous conjugate match at the in-
put and output of the power amplifier at an operating frequency of 5.2 GHz. For this
kind of matching, it is required that
Γ
S
=
Γ
OUT
, where
Γ
S
,
Γ
IN
,
Γ
L
,
and
Γ
OUT
are, respectively, the source, input, load, and output reflection coefficients.
The source (
Γ
MS
) and load (
Γ
ML
) reflection coefficients for a simultaneous conju-
gate match can be calculated based on the unmatched S parameters of the amplifier
according to the equations presented in [
17
] and repeated here for clarity:
Γ
IN
and
Γ
L
=
B
1
−
|
(S
11
−
S
22
)
|
B
1
±
4
2
Γ
MS
=
,
(10.3)
2
(S
11
−
S
22
)
B
2
−
S
11
)
2
B
2
±
4
|
(S
22
−
|
Γ
ML
=
,
(10.4)
S
11
)
2
(S
22
−
2
2
2
,
B
1
=
1
+|
S
11
|
−|
S
22
|
−|
|
(10.5)
2
2
2
,
B
2
=
1
+|
S
22
|
−|
S
11
|
−|
|
(10.6)
where
is the determinant of the two-port amplifier S-parameters matrix:
=
S
11
S
22
−
S
12
S
21
.
The source (
Z
MS
) and load (
Z
ML
) impedances to be presented at the amplifier
input and output are determined using (
10.3
) and (
10.4
). The maximum transducer
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