Hardware Reference
In-Depth Information
3.5 Moore versus Mealy Time Behavior
It is very important to understand the differences between Moore and Mealy solutions
well. To do that, let us compare the timing responses of the Moore and Mealy
circuits designed above for the nonoverlapping “010” detector (i gures 3.4e and 3.6d,
respectively).
An example of timing response for the Moore circuit is presented in i gure 3.7a.
The input sequence is
x
= {'0', '1', '0', '1', '0', '1', '0', '0'}. Following the state transition
diagram of i gure 3.4a, the sequence obtained for the present state is
pr_state
= {
one
,
two
,
three
,
zero
,
one
,
two
,
three
,
one
}, shown in the corresponding plot of i gure 3.7a.
Because
y
is '1' when the machine is in state
three
and '0' elsewhere, the resulting
output sequence (after a small propagation delay) is
y
= {'0', '0', '1', '0', '0', '0', '1', '0'}.
Note that
y
is indeed synchronous because it can change only when the clock ticks
(at positive clock transitions in this example), and then remains i xed during the whole
clock period. Because
y
is synchronous, glitches in
y
can happen only right after (posi-
tive) clock transitions (as already illustrated in i gure 3.5). If the optional output
register is used (to remove glitches, for example), then a registered output
y_reg
results,
which is simply a (clean) shifted version of
y
. In other words,
y
goes to '1' at the next
clock edge after the condition “010” occurs, while
y_reg
goes to '1' at the second clock
edge after that sequence happens.
Figure 3.7
Time behavior of the nonoverlapping “010” detector. (a) For the Moore circuit of i gure 3.4e. (b)
For the Mealy circuit of i gure 3.6d.
