Hardware Reference
In-Depth Information
15 Pointer-Based FSM Implementation
15.1 Introduction
In the preceding chapters we have established and used a
standard
and
generic
design
approach for
any
FSM. In the particular case of machines with a simple state transition
diagram (a single loop, for example), a simpler but possibly equivalent implementa-
tion can be adopted, which consists of building a counter that acts as a pointer to a
lookup table (LUT) that contains the desired output values. This implementation
technique, identii ed as
pointer-based FSM implementation
, is illustrated by means of a
series of examples in the sections that follow.
It is important to mention that although this technique can ease the implementa-
tion of FSMs with few loops and repetitive states (like those in chapter 14), it does
not eliminate the other design steps, including the development of a precise state
transition diagram. Also, it does not mean that a simpler circuit will result. A limita-
tion of this technique is that it is difi cult (or awkward, at least) to use an encoding
scheme other than regular sequential encoding; moreover, the encoding is set during
the design phase, so it cannot be chosen/modii ed and experimented with at compila-
tion time.
15.2 Single-Loop FSM
The general technique is illustrated with the help of i gure 15.1a, which shows an FSM
with just one loop. Note that the states' names were replaced with numeric values (to
be produced by the counter/pointer). Note also that the machine must run whenever
run
='1' occurs while the machine is in the idle state, and that it must stay in a certain
state (pointer in the 3-to-8 range) during six clock cycles (thus this is similar to a timed
state in a timed state machine, with
t
running from 0 to 5). The output values are
summarized (repeated) in the LUT of i gure 15.1b. To implement this FSM, we can
build a counter (pointer) ranging from 0 to 9 and use it to retrieve the corresponding
values from the LUT.
