Hardware Reference
In-Depth Information
needed to control some of the machine transitions. The machine only reaches state
C, which is the only state with
y
= '1', if the last
N
values of
x
are '1' (no mis-
matches). Observe the recursive expression
i
=
i
+ 1 in state B, which characterizes
a category 3 FSM. Again, to better illustrate the solution, a detailed state transition
diagram is presented, but simpler representations can obviously be used as well (as
in i gure 1.4).
An illustrative timing diagram for this circuit is included in i gure 11.6c for
N
= 4.
The inputs were considered to be updated at the negative clock edge, whereas the FSM
operates at the positive clock transition (note the dots marked on the
x
waveform,
highlighting the values of
x
as perceived by the state machine). The reader is invited
to apply the values of
x
given in i gure 11.6c to the state machine in i gure 11.6b to
check the correctness of the plots for
pr_state
,
i
, and
y
.
Based on section 11.6, the number of l ip-l ops needed to build the FSM of
i gure 11.6b is as follows. For the state register:
M
FSM
= 3 states, so
N
FSM
= 2 (assum-
ing sequential encoding). For the auxiliary register: needed for signal
i
, which ranges
from 0 to
N
1; assuming
N
= 64 bits,
N
aux
= 6 DFFs. For the optional output register:
not needed, so
N
output
= 0. For the timer: not needed, so
N
timer
= 0. Therefore,
N
total
=
8 DFFs.
−
11.7.3 Reference-Value Defi ner
In section 8.11.4 we started a discussion on a very important class of circuits, found
particularly in control applications, capable of setting reference values. An example
mentioned there was a temperature controller for an air conditioning system, which
must have a way of letting the user choose the desired (
reference
) room temperature.
As seen in that section, such circuits can be easily implemented without the FSM
approach when the increments are constant, or with category 1 FSMs otherwise,
but in the latter only if the number of reference values is small. When additional
features are required, category 3 can be an interesting alternative because it poses no
restrictions.
Let us start by examining two basic building blocks, shown in i gures 11.7a,b and
11.7c,d. The circuit of i gure 11.7a has only one control input (
up
), which must cause
the output (
ref
, the reference value) to be incremented by one unit every time
up
is
asserted (by means of a pushbutton, for example). The output must range from
ref
min
to
ref
max
, restarting automatically from
ref
min
after
ref
max
has been reached (or a reset
pulse has been applied to the circuit).
A possible solution for this problem is depicted in i gure 11.7b, requiring only four
states regardless of the number of reference values. The machine must stay in state C
during only one clock cycle (otherwise the incrementer would keep incrementing), so
CD is an unconditional transition. Note the presence of recursive equations in almost
all states, typical of category 3 FSMs.
