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In the pipeline architecture, the projection element takes 6988 cycles, the distance
element needs 19,504 cycles, and the minimum obtained in 68 cycles. The total
recognition time is much less than the summation of time consumed by each processing
elements because of all the functions are pipelined. The recognition time is not fully
match the timing analyze (Section 3.4) since the time delay such as memory addressing
and image inputting are involved in practical application. The pipeline architecture is
capable of recognizing 4690 characters in one second. A Chinese license plate contains
7 characters, and it takes about 1.5 ms to recognize a license plate. As shown in Table
3, the recognition speed of software implementation is 297.4 µs, and the pipeline
architecture is much faster, which provides about 28% speedup.
5
Conclusions
High performance real-time hardware architecture for license plate character
recognition was designed and implemented on an FPGA. Pipeline architecture was
explored, and significant speedup over equivalent software implementation achieved.
Experimental results indicate that FPGAs are very suitable for PCA based character
recognition.
Although the hardware architecture was tested on a database of Chinese license
plates, it can be modified to adapt other license plates. The recognition speed of the
hardware is related to the clock frequence, even we did not have a device for testing,
there is no reason that a fast hardware would not be achieved on FPGAs with faster
speed grade. In future work, entire license plate recognition system will be
implemented on an FPGA.
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