Hardware Reference
In-Depth Information
2
3
2
3
2
3
i
X
v
YP
v
YN
v
ZP
v
Zn
i
W
1000
000001
000001
100000
01
v
X
i
YP
i
YN
i
ZP
i
ZN
v
W
4
5
4
5
4
5
¼
ð
12
:
142
Þ
100000
000000
The presented configuration in Fig.
12.41
uses three UVCs, two grounded
capacitors and five resistors.
Assuming ideal UVCs, a routine circuit analysis of Fig.
12.41
gives the follow-
ing VM transfer functions:
s
2
C
1
C
2
1
1
R
4
R
1
þ
V
HP
V
IN
¼
ð
12
:
143
ÞÞ
Ds
ðÞ
R
2
1
1
R
4
sC
1
R
1
þ
V
BP
V
IN
¼
ð
12
:
144
Þ
Ds
ðÞ
R
2
R
3
Ds
1
1
R
4
1
R
1
þ
V
LP
V
IN
¼
ð
12
:
145
Þ
ðÞ
where
þ
þ
1
R
5
1
R
1
R
2
1
R
2
R
3
R
4
s
2
C
1
C
2
Ds
ðÞ¼
sC
1
ð
12
:
146
Þ
The expressions of
ω
0
and Q
0
can be given by:
s
C
2
R
2
r
R
5
C
1
C
2
R
4
R
2
R
3
C
1
R
3
R
4
R
5
ω
0
¼
and
Q
0
¼
R
1
ð
12
:
147
Þ
From the above equation (
12.147
), Q
0
can be varied independently by R
1,
if R
2
¼
R
3
and
ω
0
can be controlled without altering Q
0
by varying R
2
and R
3
simultaneously
and equally. The workability of this circuit has been experimentally verified using
the UVC-NIC 0520 IC which has been produced in 0.35
m technology by Brno
University of technology in cooperation with the AMI semiconductor, Czech, Ltd.
now known as ON semiconductor, Czech Republic, Ltd).
μ
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