Hardware Reference
In-Depth Information
A notch (I
NH
) response can be obtained by I
NH
¼
(I
LP
+I
HP
) and an APF (I
AP
)
response can be realized by I
AP
¼
(I
LP
+I
BP
+I
HP
) for R
1
¼
R
2
.
(ii) VM operation (I
in
¼
0 (open circuited)):
C
1
R
1
Ds
s
2
1
C
1
C
2
R
2
R
3
1
1
C
1
C
2
R
1
R
2
þ
s
V
NH
V
in
¼
V
BP
V
in
¼
V
LP
V
in
¼
ð
12
:
60
Þ
;
ðÞ
;
Ds
ðÞ
Ds
ðÞ
(iii) Transadmittance (TAM) mode operation (I
in
¼
0 (open circuited)):
R
1
Ds
C
1
R
1
R
2
Ds
s
2
1
1
1
C
1
C
2
R
1
R
2
R
3
s
I
HP
V
in
¼
I
BP
V
in
¼
I
LP
V
in
¼
ð
12
:
61
Þ
ðÞ
;
ðÞ
;
Ds
ðÞ
(iv) Transimpedance (TIM) mode operation (V
in
¼
0):
C
1
C
2
R
2
Ds
1
C
1
1
s
V
BP
I
in
¼
V
LP
I
in
¼
ð
12
:
62
Þ
ðÞ
:
Ds
ðÞ
where
þ
1
C
1
R
1
1
C
1
C
2
R
2
R
3
s
2
Ds
ðÞ¼
þ
s
ð
12
:
63
Þ
ω
0
,Q
0
and bandwidth (
ω
Q
0
) can be obtained as:
The filter parameters namely,
r
1
C
1
C
2
R
2
R
3
r
C
1
R
2
R
3
C
2
and
ω
0
1
C
1
R
1
ω
0
¼
;
Q
0
¼
R
1
Q
0
¼
ð
12
:
64
Þ
From the above equation, it is seen that Q
0
and (
ω
Q
0
) can be controlled by R
1
without
disturbing
ω
0
.
In Fig.
12.15
, each resistor R
i
(i
1, 2, 3) is simulated by two diode-connected
MOSFETs (M
Ri1
and M
Ri2
) which can be controlled by their corresponding control
voltages V
Ci
and
¼
V
Ci
. The value of the simulated resistance R
i
(assuming identical
devices with saturation region operation) can be given by:
L
R
i
¼
ð
12
:
65
Þ
ʼ
C
ox
WV
Ci
ð
V
T
Þ
2
where symbols have their usual meanings.
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