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that this element had already been introduced by Pal in 1989 [ 21 ]. CMOS
architecture of DVCC was proposed too, which however, was not attempted
by Pal in his 1989 publication. Use of DVCCs in realizing grounded to floating
positive/negative converters, floating gyrator, floating positive/negative gener-
alized impedance inverters and MSOFET-C filters were shown which had not
been conceived earlier.
• 1998:In[ 35 ], Soliman introduced two new building blocks termed as General-
ized Voltage Conveyor (GVC) and Generalized Current Conveyor (GCC).
• 1999:In[ 37 ], Awad and Soliman introduced the so called inverting second
generation current conveyor (ICCII) as the missing building block. However, it
must be pointed out that these so called ICCII were already proposed earlier in
[ 70 ] by Chong and Smith who termed them as new types of CCs denoted as CC B
whose terminals characteristic were defined as i y ¼
i x
which is exactly the same characterization as described by Awad and Soliman in
their paper [ 37 ]. Thus, the claim of Awad and Soliman of calling the ICCII as the
missing building block is questionable, however, their proposition of the new
pathological elements namely, the voltage mirror and current mirror, the nullor-
mirror representations of the various types of current conveyors including ICCII,
the proposed CMOS realization of the ICCII as well as the new voltage-mode
and current-mode all pass filters using ICCII had not been known earlier and
were, indeed, new.
• 2000:In[ 40 ], Biolek et al. proposed a new general current conveyor definition
from where they demonstrate that 12 different varieties of current conveyors can
be defined. It was also shown that 8 of the 12 current conveyors can be realized
by a five port current conveyor having differential Y input and complimentary Z
outputs commonly known as DVCC, however, the conveyors that cannot be
realized by the DVCC are CCI + ICCI+, CCI
0, v x ¼
v y and i z ¼
and ICCIII (though these can be
realized using an universal current conveyor (UCC) also) which was formerly
proposed much later.
In the same year, Adawy et al. [ 41 ] proposed a novel fully differential second
generation current conveyor (FDCCII) which was projected to be a useful
building block for mixed mode applications where fully-differential signal
processing is required. A CMOS implementation of the FDCCII was suggested
and its applications in realizing a differential input balanced output
transconductor, a four quadrant analog multiplier, universal mixed-mode second
order filter in voltage and current mode, fully differential amplifier and fully
differential filters were outlined.
In the same year Becvar et al. [ 42 ] introduced the so-called universal current
conveyor (UCC) which is an eight-port building block having three high imped-
ance input terminals (differential Y 1 ,Y 2 an d summing Y 3 ), one low impedance
input X and four current outputs ( Z 1 , Z 2 , Z 1 , Z 2 ) where the last named outputs are
complimentary to the first two outputs. A CMOS implementation was suggested
and a new type of inverting current conveyor namely, third generation inverting
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