Hardware Reference
In-Depth Information
Fig. 8.26 (continued)
current of CCII+ (2) rising from +i
z2
to
i
z2
. At this instant the output voltage at
node
'
a
'
is +V
0
(during the previous cycle) when the input current i
x1
¼
(V
in
V
x1
)/
R
s
, the output current direction at port Z
1
changes to +i
z1
this is the upper trigger point. Now the current at node
(R
2
/R
1
R
3
)V
0
at node
'
a
'
'
i
x2
¼
'
b
V
T
/R
3
and also
V
x2
/R
2
and output current at port Z
2
is
i
z2
. The output voltage at node
a
is
V
0
'
'
which remains negative until
the input
triangular waveform reaches a value
i
x1
(
V
in
V
x1
)/R
s
.
When input current
i
x1
(
R
2
/R
1
R
3
)V
0
at node
'
a
'
, the direction of the port Z
1
current of CCII+ (1) changes to
i
z1
this is the lower trigger point. Now the node
+V
x2
/R
2
and the
output current at port Z
2
for CCII+ (2) is +i
z2
. The net output voltage at node
b
current is +V
T/
R
3
and current at Port
X
2
of CCII+ (2) is +i
x2
¼
'
'
is
+V
0
which continues to remain positive until the input triangular waveform reaches
a value of +i
x1
(
a
'
'
(V
in
V
x1
)/R
s
) at port X
1
of CCII+ (1). This cycle goes on
repeating itself thereby generating a square waveform at the output as shown in
Fig.
8.26c
.
Some experimentally observed results for the circuit are shown in Fig.
8.26d, e
for which AD844 were used to realize CCII+ biased with
6 V supply with
component values taken as R
1
¼
.
The circuit of Fig.
8.27a
was proposed by Marcellis et al. [
22
] and consists of a
voltage to current converter using CCII1 along with resistor R
1
and a hysteresis
current comparator consisting of CCII along with resistor R
5
and R
6
and. The
circuit operation can be explained as follows.
The CCII generates a square wave signal V
out
converting the saturated current
Iz
2
through R
5
and R
6
into saturation voltage V
out
¼
R
2
¼
10 K
ʩ
,R
s
¼
8K
ʩ
,R
2
¼
7K
ʩ
V
sat
. A reduced version of
this output through the potential divider consisting of R
5
and R
6
goes as input to Y
1
of CCII1. This provides a current I
z1
part of which charges the capacitor C, in fact
the circuit composed of C and R
3
acts as a differentiator which differentiates the
square wave current I
z1
and thereby generating an exponential voltage at node D (V
D
)
this signal is converted into a similar shaped current I
x2
which compared with the
saturation current I
z2
thereby producing the square wave output V
out
(Fig.
8.27b
).
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