Basic Analog Circuit Building Blocks Using CCs and Application of CCs in Impedance Synthesis - Current Conveyors: Variants, Applications and Hardware Implementations - page 109

Fig. 5.31 Another lossless
FI circuit proposed by
Kiranon and Pawarangkoon
[ 87 ]

CCII+

1

V 1

CCII+

y

z y

1

4

z

x

C

x

R 1 R 2

CCII+

CCII+

x

x

3

z

z

2

V 2 2

y

y

S xj ð : Þ

0 1 5 41

It is important to note that if R 1 and C are interchanged, the circuit simulates a
floating capacitor with C eq ¼C(R 1 /R 2 ) and therefore, in this mode, the circuit can
be used for capacitance-floatation . On the other hand, if R 1 and R 2 are replaced by
capacitors C 1 and C 2 and the capacitor C is replaced by a resistor R, the circuit
simulates a ideal floating FDNR (Z(s) 1/D eq s 2 )withD eq given by D eq ¼

¼ C 1 C 2 R.

s circuit [ 35 ] employs three CCII+ as well as one CCI+, it was
shown by Kiranon and Pawarangkoon [ 87 ] that the same kind of lossless floating
inductance can also be realized by a circuit comprised of all CCII+ only along with
only two resistors and a grounded capacitor as shown here the Fig. 5.31 .
This circuit between ports 1 and 2, simulates a lossless floating inductance
L eq ¼

Whereas Senani

'

CR 1 R 2 . For a systematic derivation of number of other current-mode lossless
floating inductance circuits using CCs, the reader is referred to [ 84 , 86 , 88 , 117 ].
A more versatile floating generalized impedance convertor employing as many
as five CCII+ s along with five general impedances was proposed by Pal in [ 108 ]
which simulates a floating impedance given by Z 1-2 ¼

Z 1 Z 3 Z 5 /Z 2 Z 4 and is shown in
Fig. 5.32 . Note that the nature of this expression is identical to the one encountered
in the classical Antoniou s GIC [ 1 ] (which, however, realizes a grounded imped-

ance of the same kind). It is obvious that by judicious choice (resistive/capacitive)
of the five impedances, the circuit can be used to realize a floating inductance,
floating capacitance and floating FDNR, as follows:
Floating inductor is obtained by choosing Z 4 as a capacitor and all the remaining
impedances as resistors thereby leading to Z 1-2 ¼

'

sC 4 R 1 R 3 R 5 /R 2 . Similarly, choos-
ing Z 3 as capacitance, the circuit can be seen to be a grounded capacitor to floating
capacitance convertor with the value of the floating capacitance given by C 1-2 ¼C 3
R 1 R 5 /R 2 R 4 . Finally, with Z 2 and Z 4 chosen as capacitors, the input impedance
becomes Z 1-2 ¼ s 2 C 2 C 4 R 1 R 3 R 5 and the circuit, therefore, simulates a floating

frequency dependent negative conductance (FDNC).
A method for compensating for the series losses of the simulated floating
inductor employing four CCs was presented by Ferri et al. in [ 104 ] which involved
addition of two more current conveyors along with two resistors to the structure.
The scheme proposed by them is shown here in Fig. 5.33 .