Baseline Switching Modules and Routers - Microarchitecture of Network-on-Chip Routers - page 36

Chapter 3
Baseline Switching Modules and Routers
Having described the flow of data on a point-to-point link (1-to-1 connection)
and the implications of each design choice, in this chapter, we move one step
forward and describe the operation of modules that allow many to one and many
to many connections. The operation of such modules involves, besides flow control,
additional operations such as allocation and multiplexing that require the addition
of extra control state per input and per output.
In many cases, it is advantageous to allow two or more peers to share the same
link for transmitting data to one receiver. This is a common example in modern
systems like when many on-chip processors are trying to access the same off-chip
memory controller. An example of sharing a link by many peers is shown in Fig. 3.1 .
In this example, each input (IP core) generates one packet that is heading towards
the memory controller (receiver). The link cannot accommodate the flits of many
packets simultaneously. Therefore, we need to develop a structure that would allow
both packets to share the wires of the link.
Sharing the wires of the link requires the addition of a multiplexer in front of the
link (at the output of the multiple-input sender). The multiplexer select signals are
driven the arbiter that determines which input will connect to the memory controller.
We have two design options on how to drive the select signals. The arbiter can select
in each cycle a different input or it can keep the selection fixed for many cycles until
one input is able to transmit a complete packet. VCT and WH switching policies
requires that each packet is sent on the link un-interrupted. In other words, once the
head of the packet passes the output multiplexer the connection is fixed until the tail
of the same packet passes from the output port of the sender.
Alternatively, we could change the value of the multiplexer's select signal on
each cycle, thus allowing flits of different packets to be interleaved on the link on
consecutive cycles. This operation is prohibited for WH and VCT and can be applied
only when more state is kept for the packets stored at the receiver. This extra state
makes the input buffer of the receiver look like a parallel set of independent queues,
called virtual channels, and is the subject of the following topic chapters.