Virtual-Channel Flow Control and Buffering - Microarchitecture of Network-on-Chip Routers - page 100

Fig. 6.12 The organization of an ElastiStore primitive for 3 VCs. ElastiStore consists of just a
single register per VC (main registers) along with a shared register that is dynamically shared by
all VCs
ElastiStore saves many buffer slots per VC buffer, as compared to the baseline
VC-based EB of Fig. 6.5 , and limits throughput only under heavy congestion that
blocks all the VCs except one. In the case of light traffic, a single active VC receives
100 % throughput without any limitation.
ElastiStore can be designed using the datapath shown in Fig. 6.12 , which consists
of a single register per VC (main registers) along with a shared register that is
dynamically shared by all VCs. The select signals of the bypass multiplexers, the
load enable signals of the registers, as well as the interface ready/valid signals are
all connected to ElastiStore control.
When a new flit that belongs to the i th VC arrives at the input of ElastiStore, it
may be placed either in the main register of the corresponding VC, or in the shared
register. If the main register of the i th VC is empty, or becomes empty in the same
cycle, the flit will occupy this position. If the main register is full, the incoming flit
will move to the shared buffer. Concurrently, once the shared buffer is utilized, all
the VCs that have their main register full will stop being ready to accept new data,
while those with an empty main register remain un-affected. In ElastiStore, any VC
is ready to accept a new flit if at least one of two registers is empty: either the main
register corresponding to said VC, or the shared one.
ElastiStore dequeues data only from the main registers. The shared register acts
only as an auxiliary storage and does not participate in any arbitration that selects
which VC should be dequeued. When the main register of a VC dequeues a new flit
and the shared buffer is occupied by the same VC, the main register of this VC is
refilled by the data stored in the shared buffer in the same cycle. The shared buffer
cannot receive a new word in the same cycle, since its readiness - which releases