Hardware Reference
In-Depth Information
5.4
Pipelined Routers with RC and SA Pipeline Stages
The RC and SA pipeline stages can be combined in pairs and derive 3-stage
pipelined implementations that schedule RC, SA, and ST in different clock cycles.
Some of the possible alternatives do not offer any real benefit to the design of
the router since they preserve certain architectural dependencies that introduce
significant number of bubbles in the pipeline. Instead, in this section, we will
describe two of the most useful alternatives that isolate the internal timing paths
of the router and minimize at the same time the idle cycles in the operation of the
router.
5.4.1
Pipelining the Router Only in the Control Path
One of the two organizations discussed in this chapter includes an RC pipeline and
a SA pipeline stage, where pipelining occurs, in both cases, only in the router's
control path. For the SA-control pipeline we assume the organization presented in
Sect.
5.3.2
. In this case, the output of the SA is driven to a pipeline register that
returns the grants to the inputs, but also stores them for direct use by the body and
tail flits of the same packet that move directly to SA once they have available credits.
The complete organization of the 3-stage control-path pipelined router is shown in
Fig.
5.15
, while an example of its operation is shown in Fig.
5.16
.
credit
updat
e
credit
update
pipeline
register
pipeline
register
outAvailable[0...N-1]
outAvailable[0...N-1]
outPort
outPort
ready out[0...N-1]
ready out[0...N-1]
CC
CC
RC
RC
SU
SU
req
en
en
SA
outLock
outLock
1
1
0
SA
dst
dst
en
en
head
head
sets on head
resets on tail
sets on head
resets on tail
credit update
credit update
0
1
1
0
1
valid
data
valid
data
valid
valid
1
ST
ST
data
data
Input #i
Input #i
Output #j
Output #j
Fig. 5.15
The organization of a 3-stage pipelined router that executes RC in the first pipeline
stage, SA in the second and ST in the last stage. Pipeline registers have been added only in the
control path of the router
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