Introduction - SVA: The Power of Assertions in SystemVerilog - page 28

1.11. What are the main similarities and the main differences between SVA and

PSL?

1.12. Simultaneous reads and writes

(a) Express a statement forbidding simultaneous reads and writes as an immediate,

deferred and concurrent assertion. Reuse the common part in all assertions.

(b) Write a checker forbidding simultaneous reads and writes. Also check that both

reads and writes actually happen.

1.13. Request is always granted

(a) Write a concurrent assertion stating that each request should be granted at the

next cycle.

(b) Is it possible to express the same thing as an immediate assertion?

(c) As a deferred assertion?

1.14. Write the following assertion: When reset is deasserted it remains low
forever.