Hardware Reference
In-Depth Information
convert the 3.3 V GPIO output into a 5 V TTL signal, for example. The 2N2222A transistor
has an absolute maximum
V
CE
of 30 V. This allows you to drive even higher voltage loads,
provided that you stay within the transistor's current and power ratings.
Driver Design
The transistor driver circuit is limited by the power-handling capability of
Q
1
and the
maximum collector current. Looking at the datasheet, the maximum power listed for
Q
1
is 0.5 W at 25°C. When the transistor is turned on (saturated), the voltage across
Q
1
(V
CE
)
is between 0.3 V and 1 V (see V
CE(sat)
in the datasheet). The remainder of the voltage is
developed across the load. If we assume the worst case of 1 V for
V
CE
(leaving 4 V across
the load), we can compute the maximum current for
I
C
:
P
V
Q
1
I
=
C
CE
1
03
3
=
=
.
A
Clearly, this calculated current exceeds the listed absolute maximum current
I
C
of
600 mA. So we use the maximum current for
I
C
= 600 mA instead. For safety, we use the
minimum of these maximum ratings. While this transistor is clearly capable of driving up
to 600 mA of current, let's design our driver for a modest current flow of 100 mA.
The next thing to check is the
H
FE
of the part. The parameter value required is the
lowest H
FE
value for the amount of collector current flowing (
H
FE
drops with increasing
I
C
current). A STMicroelectronics datasheet shows its 2N2222A part as having an
H
FE
= 40,
I
C
= 500
mA
, with
V
CE
= 10
V
. They also have a more favorable
H
FE
value of 100, for 150 mA,
but it is best to err on the side of safety. We can probably assume a safe compromise of
H
FE
= 50.
The
H
FE
parameter is important because it affects how much current is required to
drive
Q
1
's base. The input base current is calculated as follows:
I
H
I
=
C
FE
B
100
50
mA
=
=
2
mA
This value tells us that the GPIO pin will need to supply up to 2 mA of drive into
Q
1
's
base. With 2 mA of drive,
Q
1
will be able to conduct up to 100 mA in the collector circuit.
A current of 2 mA is easily accommodated by any GPIO pin. Note that if you were to
design closer to the design limits of this transistor (500 mA in this example), you should
probably allow an additional 10% of base current “overdrive” to make certain that the
transistor goes into saturation.
