Hardware Reference
In-Depth Information
To visualize how the Raspberry Pi controls drive strength, examine Figure
10-3
. The
control lines Drive0 through Drive2 are enabled by bits in the DRIVE register. With these
three control lines disabled (zero), only the bottom 2 mA amplifier is active (this amplifier
is always enabled for outputs). This represents the weakest drive-strength setting.
Figure 10-3.
Drive-strength control
With Drive0 set to a 1, the top amplifier is enabled, adding another 2 mA of drive,
for a total of 4 mA. Enabling Drive1 adds a further 4 mA of drive, totaling 8 mA. Enabling
Drive2 brings the total drive capability to 16 mA.
It should be mentioned that these drive capabilities are
not current limiters
in
any way. What they do is apply more amplifier drive in order to meet the logic-level
requirements (next section). If the GPIO output is wired up to a light load like a CMOS
chip or MOSFET transistor where little current is drawn, then the minimum drive of 2 mA
suffices. The single GPIO 2 mA buffer can effortlessly establish a logic high in its proper
voltage range as well as bring the voltage to a logic low when required.
When the GPIO output is loaded with a higher current load, the single 2 mA buffer
may not be enough to keep the logic level within spec. By applying more amplifier drive,
the output voltage levels are coerced into the correct operating range.
