Hardware Reference
In-Depth Information
4.
Read the input value.
a.
A reading of 1 means that the input was pulled high.
b.
A reading of 0 means that the input was pulled low.
Note that GPIO pins 2 and 3 are pulled up by external resistors, while others may be
connected to other circuits (GPIO 6). This will affect your readings for those pins. Note
also that pins configured for alternate functions may be
outputs
and will be driven.
When the input GPIO is configured with no pull-up, you
might
see random values,
but this is unreliable. An input voltage can float above or below a threshold and remain
there for a time.
The script presented in the “GPIO Input Test” section can be used to test a GPIO
input (
^C
to exit the script).
Logic Levels
GPIO pins use 3 V logic levels. The precise BCM2835 SoC logic-level specifications are as
follows:
Parameter
Volts
Description
V
IL
£ 0
.
8
Voltage, input low
V
IH
³ 1
.
3
Voltage, input high
As we work through several projects in this topic, we'll be making frequent
references to these parameters. You might want to commit these voltage levels to memory
or mark the page with a tab. The voltage levels between V
IL
and V
IH
are considered to be
ambiguous or undefined, and must be avoided.
Drive Strength
How much drive can a GPIO pin provide in terms of current drive? The design of the
SoC is such that each GPIO pin can safely sink or source up to 16 mA without causing
it harm.
28
The drive strength is also software configurable from 2 mA up to 16 mA.
29
The boot-up default is to use the drive strength of 8 mA.
28
However, as our test program
pads.c
will show, the GPIO outputs 28 to 45 were found configured for 16 mA (GPIO 28 to
31 are available on header P5).
Table
10-3
shows the SoC registers for reading and configuring the drive strength
of the GPIO pins. There are three registers, affecting GPIO pins in three groups of 28
(two groups affect user-accessible GPIOs). The slew rate, hysteresis, and drive strength
settings all apply at the group level. The drive strength is configured through a 3-bit value
from 2 mA to 16 mA, in increments of 2 mA. When writing to these registers, the field
PASSWRD must contain the hexadecimal value 0x5A, as a guard against accidental changes.
