Hardware Reference
In-Depth Information
Figure 9.5
Debounce circuit based on an RS bistable
Figure 9.6
Alternative switch debounce circuits: (a) based on NAND gates;
(b) based on NOR
An alternative, but somewhat more complex, switch de-bouncing arrange-
ment is shown in Figure 9.5. Here a single-pole double-throw (SPDT)
changeover switch is employed. This arrangement has the advantage of provid-
ing complementary outputs (Q and /Q) and it obeys the following state table:
Logic output
Switch condition
Q
/Q
Q
→
1
1
0
Q
→
0
0
1
Rather than use an integrated circuit RS bistable in the configuration of Figure
9.5 it is often expedient to make use of 'spare' two-input NAND or NOR gates
arranged to form bistables using the circuits shown in Figures 9.6(a) and (b),
respectively. Figure 9.7 shows a rather neat extension of this theme in the form
of a touch-operated switch. This arrangement is based on a 4011 CMOS quad
two-input NAND gate (though only two gates of the package are actually used
in this particular configuration).
Finally, it is sometimes necessary to generate a latching action from an NO
push-button switch. Figure 9.8 shows an arrangement in which a 74LS73 JK
bistable is clocked from the output of a debounced switch.
