Hardware Reference
In-Depth Information
ativity allows a 64 KB cache to be addressed with a physical index, despite the handicap of 4
KB pages in the IBM architecture.
Summary Of Basic Cache Optimization
The techniques in this section to improve miss rate, miss penalty, and hit time generally im-
pact the other components of the average memory access equation as well as the complexity
of the memory hierarchy. Figure B.18 summarizes these techniques and estimates the impact
on complexity, with + meaning that the technique improves the factor, - meaning it hurts that
factor, and blank meaning it has no impact. No optimization in this figure helps more than
one category.
FIGURE B.18 Summary of basic cache optimizations showing impact on cache per-
formance and complexity for the techniques in this appendix . Generally a technique
helps only one factor. + means that the technique improves the factor, - means it hurts that
factor, and blank means it has no impact. The complexity measure is subjective, with 0 being
the easiest and 3 being a challenge.
B.4 Virtual Memory
… a system has been devised to make the core drum combination appear to the programmer as a
single level store, the requisite transfers taking place automatically.
Kilburn et al. [1962]
At any instant in time computers are running multiple processes, each with its own address
space. (Processes are described in the next section.) It would be too expensive to dedicate a full
address space worth of memory for each process, especially since many processes use only a
small part of their address space. Hence, there must be a means of sharing a smaller amount
of physical memory among many processes.
One way to do this, virtual memory , divides physical memory into blocks and allocates them
to different processes. Inherent in such an approach must be a protection scheme that restricts a
 
 
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