Instruction Set Principles - Computer Architecture: A Quantitative Approach - page 527

FIGURE A.22 Instruction layout for MIPS . All instructions are encoded in one of three
types, with common fields in the same location in each format.
Appendix K shows a variant of MIPS--called MIPS16--which has 16-bit and 32-bit instruc-
tions to improve code density for embedded applications. We will stick to the traditional 32-bit
format in this topic.
MIPS Operations
MIPS supports the list of simple operations recommended above plus a few others. There are
four broad classes of instructions: loads and stores, ALU operations, branches and jumps, and
floating-point operations.
Any of the general-purpose or floating-point registers may be loaded or stored, except that
loading R0 has no effect. Figure A.23 gives examples of the load and store instructions. Single-
precision floating-point numbers occupy half a floating-point register. Conversions between
single and double precision must be done explicitly. The floating-point format is IEEE 754 (see
Appendix J). A list of all the MIPS instructions in our subset appears in Figure A.26 (page
A-40).