Image Processing Reference
In-Depth Information
set is smaller than the second set. Furthermore, the reverse converter for the moduli set {2
n
-
1, 2
n
, 2
n
+1, 2
2n
+1
-1} relies on less hardware requirements than others. From another side, the
moduli sets {2
n
-1, 2
n
, 2
n
+1, 2
2
n
+1
-1} and {2
n
-1, 2
n
+1, 2
2n
, 2
2n
+1
-1} results in faster RNS
arithmetic units than the moduli sets {2
n
-1,2
n
, 2
n
+1, 2
2
n
+1} and {2
n
-1, 2
n
+1, 2
2
n
, 2
2
n
+1}.
x
x
x
x
Operand Preparation Unit 1
2
n
-bit CSA with EAC
2
n
-bit CSA with EAC
2
n
-bit CPA with EAC
Y
0
(2
n
+1)-bit CSA with EAC
(2
n
+1)-bit CPA with EAC
T
Y
Operand Preparation Unit 2
1
(4
n
+1)-bit CPA
x
X
Fig. 4. The converter for moduli set {2
n
-1, 2
n
+1, 2
2n
, 2
2n
+1
-1} (Molahosseini & Navi, 2010)
8. Conclusion
The Residue Number System has been recognized as one of the efficient alternative number
systems which can be used to high-speed hardware implementation of Digital Signal
Processing computation algorithms. However, forward and reverse converters are needed
to act as interfaces between RNS and the conventional binary digital systems. The overhead
of these converters can frustrate the speed efficiency of RNS, and due to this a lot of research
