Digital Signal Processing Reference
In-Depth Information
i
ac
v
ac
Figure 11-40
Circuit for extracting I/O capacitance.
11.10.3 Differential I/O Models
The IBIS standard includes the ability to specify models for differential
transceivers, although the process is more complex than for singled-ended
circuits. A differential model is specified as using a driver pair along with a
series model, in the manner shown in Figure 11-41a. This structure allows
the models to comprehend the differential and common-mode characteristics
of a differential I/O circuit. Proper modeling requires specification of the
common-mode and differential-mode
i
-
v
tables. As a result, the common-mode
and differential-mode currents must be must be extracted and separated. Extrac-
tion of the
v
-
t
tables uses the same techniques as for single-ended transmitters,
with the addition of a current source in between the output pins to cancel differ-
ential currents inside the transistor model, as shown in Figure 11-41b. The I/O
capacitance must include the differential capacitance between the two signals,
as Figure 11-41c shows, with the differential and total capacitance expressed as
=
−
Im
(i
dc
)
2
πf v
ac
C
diff
(11-13)
=
−
Im
(i
dc
)
−
Im
(i
ac
)
2
πf v
ac
C
comp
(11-14)
where
i
dc
is the current measured through the dc voltage source,
i
ac
is the
current measured through the ac voltage source, and
v
ac
is the amplitude of the
ac source. The current through the dc source will have an imaginary portion
only if there is a reactive path between the two pads of the differential signal.
As a final thought, we note that multi-Gb/s differential signaling is still in
the early stages of deployment and that the IBIS specification has not yet fully
comprehended the needs of those high-performance links, although the standard
will continue to evolve to do so in the near future.
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