TOPICS IN HIGH-SPEED CHANNEL MODELING - Advanced Signal Integrity for High-Speed Digital Design - page 430

differential response shows almost no ill effects. Differential routing will also
reduce significantly the crosstalk seen between pairs because much less current
is forced to flow around the gap.
10.2.3 Summary
Section 10.2.2 we used the example of a transmission line traversing a gap in
the reference plane to demonstrate the general behavior seen with any nonideal
current return path. In summary, the signal integrity of a bus with nonideal return
path(s) will exhibit the following attributes:
1. Appear as an inductive discontinuity in a TDR waveform
2. Slow the edge rate at the receiver
3. Severely distort the waveform at the receiver if the electrical delay of the
current divergence path is longer than the rise and fall times
4. Create unwanted transmission paths that can increase coupling or loss sig-
nificantly
Differential signaling is much more immune to the effects of a nonideal return
path because the adjacent signal (or the virtual reference plane) provides a contin-
uous reference for the fields. Hall et al. [2000] discuss numerous other nonideal
current return paths.
10.3 VIAS
For high data rates, vias can, if not designed, properly degrade the signal integrity
of a binary bit stream significantly. For single-ended signaling, if a suitable return
path via is not placed in close proximity to every signal via, a nonideal return path
is created. For differential signaling, if a ground via placement is not symmetrical
with respect to each leg of the differential pair, asymmetry can be introduced,
resulting in differential energy being converted to common mode (as described
in Section 7.6.1). Finally, stubs associated with plated-through-hole vias can
resonate, causing severe distortion of waveforms. In this section we cover the
largest pitfalls of via design and discuss ways to mitigate the ill effects through
proper design.
10.3.1 Via Resonance †
To begin, consider the cross section of an eight-layer printed circuit board (PCB)
shown in Figure 10-17. The figure shows a signal routed on signal layer 1 transi-
tioning through a plated-through-hole (PTH) via to signal layer 4. The ground via
† The authors would like to thank Guy Barnes of Ansoft Corporation for performing the 3D simula-
tions used in this section. His technical knowledge, modeling expertise, and patience were invaluable.