Image Processing Reference
In-Depth Information
The use of a task oriented embedded system such as FPGA can significantly de-
crease the total execution time of the method. Due to their features, a CA-based
implementation using an FPGA can exploit their potentiality for an entirely paral-
lel system executing simultaneously multiple threads and thus, the unknown cell
states can be defined. On the other hand, the implementation with a general purpose
processor poses some speed related restriction. With the assumption that the used
processor embeds more than one core, it simulates the parallel execution of multiple
threads which eventually corresponds to a CA cell evolution. Thus, the total number
of the FPGA executed threads are significantly superior related to the correspond-
ing threads of a general purpose processor. In addition, both implementations of the
Canny edge detector display major differences related to their execution time. The
FPGA implementation handles multiple execution threads while a single process is
available with the corresponding general purpose processor. Moreover, images with
an increased number of edges require additional execution circles in order to pro-
duce the desired edge maps. In concluding, these variations between the two tested
systems pose many restrictions to accurately evaluate the total speed improvement
since no common execution base can be identified.
2.6
Discussion and Conclusions
In this paper, a new image resizing method based on the CA and the Canny edge
detector was introduced. The Canny edge detector is initially applied in order to
discriminate the edge areas from the homogenous areas. The idea was to enhance the
performance of the proposed CA based image resizing method with a robust edge
detector resulting in less computational burden. Towards this direction, as a future
work the application of CA oriented edge detector coupled with the CA algorithm
already proposed could possibly lead to advantageous results in terms of parallelism
and computational speed.
The resulted binary edge map is then upscaled and it is processed as a CA grid.
Appropriate CA states and transition rules were constructed to evolve the CA which
eventually attempt to enhance the quality of the edged areas. The orientation of the
edge cells is considered in order to preserve effectively the edges of the initial image.
Finally, a simple linear transformation is applied to re-evaluate the light intensity
value of each pixel for the final resized image. In terms of quantitative comparison
based on the PSNR values, the method demonstrates sufficient performance while
the required processing time is kept at low levels due to the parallel nature of the
CA. It is clear the proposed CA-based algorithm successfully achieves the goals of
real-time interpolation and good subjective quality. Consequently, the method could
be considered as appropriate for systems with low technical specifications, i.e. low
resolution cameras, when further image processing is required.
Moreover, in order to enhance the performance of the proposed CA image resiz-
ing technique the usage of Genetic Algorithms (GA) so as to provide CA rules in
correspondence with the under study image should be also examined. More specif-
ically, CA have been successfully linked with GA in the past resulting in quite
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