Hardware Reference
In-Depth Information
IPOLx Register
Bits set in this register will invert the logic sense of the corresponding GPIO inputs. In our
project, we used no inversion and set the bits to 0.
IPOLx Register
GPIO
Address
Bit
7
6
5
4
3
2
1
0
A
0x02
R
Y
Y
Y
Y
Y
Y
Y
Y
B
0x03
W
Y
Y
Y
Y
Y
Y
Y
Y
Reset
0
0
0
0
0
0
0
0
IPOLx Bit Value
0
Read same logic as input pin
1
Read inverted logic of input pin
IODIRx Register
This register determines whether a given GPIO pin is an input or an output. Our project
defines bits 4 through 7 as inputs, with the remaining bits 0 through 3 of each 8-bit port as
outputs.
IODIRx Register
GPIO
Address
Bit
7
6
5
4
3
2
1
0
A
0x00
R
Y
Y
Y
Y
Y
Y
Y
Y
B
0x01
W
Y
Y
Y
Y
Y
Y
Y
Y
Reset
1
1
1
1
1
1
1
1
IODIRx Bit Value
0
Pin is configured as an output
1
Pin is configured as an input
