Security Issues in QCA Circuit Design - Power Analysis Attacks - Field-Coupled Nanocomputing: Paradigms, Progress, and Perspectives - page 203

Fig. 8. The QCA layout of an inverter.

Table 2. Power consumption of an inverter with different tunnelling energy levels
( T =2 . 0K)

Input Hamming Power dissipated

switching distance γ =0 . 25 E k γ =0 . 5 E k γ =0 . 75 E k γ =1 . 0 E k

(meV) (meV) (meV) (meV)

0 → 0 0 0.8 2.7 5.2 8.0

1 → 1 0.8 2.7 5.0 8.0

0 → 1 1 28.4 28.6 29.3 30.2

→

1 0 28.4 28.6 29.3 30.2

a CMOS inverter. Therefore, the power consumption of a QCA inverter is also
dependent on the HD of its inputs.
The other basic gate in QCA is the majority gate, the layout of which is shown
in Fig. 9 . Its power consumption for input switching from 0 (“000”) to 7 (“111”) is
provided in Table 3 under different tunneling energy levels. As with the inverters,
the power consumption does not vary as the temperature range is small. For
HD = 1, only one input of the majority gate changes its polarisation. Thus, only
a little power is consumed. In the case of HD > 1, more cell inputs change and
the output polarisation changes, which increases the power consumption. It is
apparent that switching with a higher HD results in higher power consumption.
Figure 10 clearly illustrates the strong dependence between the HD and the
power consumption under various tunneling energy levels. Since the functional

Fig. 9. The QCA layout of a majority gate.