Security Issues in QCA Circuit Design - Power Analysis Attacks - Field-Coupled Nanocomputing: Paradigms, Progress, and Perspectives - page 202

(a) (b)

Fig. 6. Static power consumption in a CMOS inverter when input keeps unchanged
as: (a) logic '1'; and (b) logic '0'.

(a) (b)

Fig. 7. Dynamic power consumption in a CMOS inverter when input is changing:
(a) from '1' to '0'; and (b) from '0' to '1'.

Table 1. Power consumption of an CMOS inverter with different input changes

Inputs Hamming distance Types of power consumption

0 → 0 0 Static power

1 → 1
1 → 0 1 Static power + dynamic power

0 → 1