Security Issues in QCA Circuit Design - Power Analysis Attacks - Field-Coupled Nanocomputing: Paradigms, Progress, and Perspectives - page 193

1 Introduction

CMOS technology is approaching its scaling limitation [ 1 ]. New nanotechnologies
are explored to continue Moore's Law. Among the possible alternatives to CMOS
technology, Quantum-dot cellular automata (QCA) [ 2 , 3 ] is a promising one.
QCA can offer significant advantages including fast speed, high density and low
power consumption. There are four possible implementations of QCA technology
[ 4 ]: metal-island QCA, semiconductor QCA, molecular QCA and magnetic QCA.
The use of semiconductor QCAs is assumed in this chapter, as most prototypes of
QCA circuits were demonstrated by metal-island and semiconductor QCA so far.
Semiconductor QCAs have been manufactured from standard semiconductive
materials [ 5 ]. However, they can only work in very low temperature.
The elementary units of QCA technology are cells. The cells consist of square
nano-structures with a quantum-dot in each corner as shown schematically in
Fig. 1 (a). Two electrons that can tunnel among the four quantum dots are res-
ident in a QCA cell. These two electrons tend to occupy antipodal sites within
the cell due to Coulombic repulsion. The tunneling action only occurs within
cells. Therefore, two ground states with polarisations of ' 1' and '1' can be used

to represent binary '0' and '1', respectively. There is no physical wire in QCA.
Instead, a chain of coupled cells is used as a QCA “wire,” as shown in Fig. 1 (b).
There are two basic logic components in QCA: inverters and three-input major-
ity gates. Three-input majority gates realize the following logic function:

−

M ( a, b, c )= ab + ac + bc, (1)

where a, b and c are inputs. Two-input AND or OR gates can be implemented by
fixing one of majority gate's input to '0' or '1', respectively. A four-phase clocking
scheme is typically used for semiconductor QCAs [ 3 ]. QCA circuits are divided
into four clocking zones and each zone contains four phases with a 90 ⓦ phase
shift between adjacent zones. A latched clocking zone is used as the input to the
subsequent zone and cells in the other two zones do not affect these computing
zones as they are in inactive states. Since the cells in one clocking zone become
latched and remain in this state until the cells are latched in the next clocking
zone, information is transferred and processed in a pipelined manner.
QCA technology not only provides a fundamentally novel physical structure,
but also offers a new kind of computing architecture for digital design. Simple
QCA components have been fabricated and demonstrated [ 6 - 8 ] and more com-
plex circuits [ 9 - 15 ] have been designed and verified by simulation tools. Digital
design methods for QCA circuits [ 16 - 21 ] have also been explored to achieve more
ecient designs.
The power consumption of QCA designs is not expected to be significant
[ 22 ]. However, side channel analysis (SCA) attacks [ 23 , 24 ] have emerged as a
significant threat to CMOS cryptographic circuits in the past decade. These
attacks exploit the key information leaked by the physical implementation of a
cryptographic cipher. Typically the amount of side-channel information required
to break the cipher is very small [ 24 ]. One of the most powerful SCA techniques is