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put, using a quadrature encoding, also known as a two-bit Gray code. This is the same
encoding that ball mice generated by a pair of shaft encoders (optical shaft encoders
in some designs). It assures that a device receiving the signals asynchronously will
not get an error from two bits switching at not quite the same time.
1.6 Dynamic Logic
The two-phase nonoverlapping-clock pass-transistor-based dynamic logic used in
the Mead-Conway nMOS VLSI methodology was almost a good match to the self-
timed optical sensor approach. But since the duration of the long phase was not
bounded, dynamic nodes set on the short phase could have decayed away, espe-
cially due to light falling on the chip, during that time. This potential problem was
anticipated and was easily avoided by adding gated positive feedback to those nodes
during the long phase, so that all data was held statically during those times. With
this simple addition to the usual two-phase latches, and with the short phase being
less than a microsecond, the logic was robust enough that no light shielding was
needed.
1.7 Testing
I tested the first mouse chip by wiring it into the mouse port of my Xerox Alto com-
puter and projecting patterns onto it. When I got the cursor to move in all directions,
I declared success. Unfortunately, more rigorous testing was complicated by the fact
that I had forgotten to give the chip any electrical input paths. With my team-mate
Martin Haeberli, we soon set about designing the next version, with a more compact
pixel array better suited to a short optical path, and with inputs that would allow
selectively discharging any set of photodiodes, so that all the logic could be tested
on a standard electronic chip tester [
26
]. The resulting product chip layout is shown
in Fig.
1.18
, and the cover of the magazine that featured it is shown in Fig.
1.19
.
1.8 Going Meta
My manager at the time, Lynn Conway, always had (and ever since has) encour-
aged me to “go meta” with my ideas, which is why my original optical mouse
report included the subtitle “and an Architectural Methodology for Smart Digital
Sensors.” A condensed version of the report, with the same title, was created to go
with my invited opening talk at the 1981
VLSI Systems and Computation
meeting at
CMU [
20
]. The methodology was basically to combine the Mead-Conway digital
design methods, including concepts of self-timed logic, with analog sensors such as
