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survey recent results in both high-performance and low-power camera nodes. We also
look at distributed middleware for distributed camera networks that provide a more
powerful platform for smart camera developers. Finally, we consider algorithms and
services at the network level.
11.2 High-Performance Camera Nodes
Multimedia has been a major driver for system-on-chip development for several
decades; this effort has served as a foundation for embedded vision platforms. A CV-
aware platform is traditionally designed with several goals in mind. High throughput
is important, not just on integer data but also on floating-point operations. Numerical
precision is also an important characteristic, with some interesting trade-offs possible
between accuracy and other system objectives. Low energy operation is a critical
parameter for modern SoCs, which must operate without fans and may operate on
battery power. These platforms are also engineered for relatively low cost compared
to desktop processors. The combination of low energy and low cost has driven many
platform designs to heterogeneous multiprocessors [
31
].
Small form factor cameras open up a wide range of new applications. Small
cameras can fit into a variety of physical positions that provide new views of the
subject, particularly if the camera does not require cables. Retail is one example
of a field that can use cameras installed in product displays to monitor customer
behavior. Low-power cameras are often cheap, which puts them into the budgets of
more potential users. However, cameras designed to fit into small spaces must operate
at low power levels to avoid generating excessive heat. Many users also appreciate
the privacy gained by performing in-camera analysis and not transmitting video.
We now know a great deal about how to accelerate video compression, but
we still have something to learn about accelerating computer vision algorithms.
Vision algorithms differ from compression algorithms in that they generally require
higher numerical precision. Numerical representations provide a rich set of trade-
offs between algorithmic accuracy, energy consumption, and area but these trade-offs
need careful evaluation by the designer. Like compression, vision algorithms often
have complex control flows. However, while many compression algorithms are pixel-
oriented, many later-stage vision algorithms make greater use of data structures.
Semiconductor manufacturers continue to refine the design of hardware platforms
for vision applications, many of which are heterogeneous multiprocessor systems-
on-chips (MPSoCs). EVE (embedded vision/vector engine) [
25
] is a co-processor
for embedded vision. It includes a RISC core, a vector core, a DMA engine, a custom
memory switch, and several specialized memories. The DMA engine supports ping-
pong buffering in which the DMA engine fills one side of the buffer for the next
round of operations, while the processors operate on the other side of the buffer. The
vector unit provides scatter/gather memory access to provide additional flexibility
for mid-level vision algorithms with data-dependent regions. The fact that computer
vision systems have not been standardized in the way that video compression has
